QS5LV919-160J
MFR #QS5LV919-160J
FPN#QS5LV919-160J-FL
MFRIDT
Part Description3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER
Datasheet
Quote Only
Product Attributes
| Main Category | Semiconductors |
| Category | Integrated Circuits (ICs) |
| Sub Category | Clock and Timing |
| Family Name | QS5LV919 |
| Packaging Type | Tape and Reel |
| Packaging Quantity | N/A |
| Lifecycle Status | Obsolete (Unconfirmed) |
| RoHS | Not Compliant |
| RoHS Exemption Type | RoHS (2015/863) |
| Reach Status | Not Compliant |
| Differential Input Output | Yes/Yes |
| Divider Multiplier | Yes/No |
| Input Type | Clock |
| Interface Type | N/A |
| Life Cycle Status | Obsolete (Unconfirmed) |
| Maximum Duty Cycle | 75% |
| Maximum Input Frequency | 100MHz |
| Maximum Operating Temperature | 85°C (TA) |
| Maximum Output Frequency | 160MHz |
| Maximum Supply Voltage | 3.6V |
| Minimum Operating Temperature | -40°C (TA) |
| Minimum Output Frequency | N/A |
| Minimum Supply Voltage | 3V |
| Number of Circuits | 1 |
| Number of Inputs | 2 |
| Number of Outputs | 8 |
| Output Type | Clock, LVTTL |
| PLL | Yes |
| Package Type | 28-PLCC (11.51x11.51) |
| Supply Current | 1mA |
| Type | Clock Driver |
| Typical Output Skew | 300ps (Max) |
| Typical RMS Phase Jitter | N/A |